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55 56
DQ18 DQ22
DDR_B_D47 DDR_B_D43
57 58
2 2 2 2 2 2 2 2 2 2 DQ19 DQ23
59 60
VSS VSS
DDR_B_D37 DDR_B_D36
61 62
DQ24 DQ28
DDR_B_D32 DDR_B_D33
63 64
DQ25 DQ29
65 66
VSS VSS
@
@ DDR_B_DM4 DDR_B_DQS#4
67 68
DM3 DQS3#
DDR_B_DQS4
69 70
NC DQS3
71 72
VSS VSS
DDR_B_D39 DDR_B_D34
73 74
DQ26 DQ30
DDR_B_D35 DDR_B_D38
75 76
DQ27 DQ31
77 78
VSS VSS
C C
DDR_CKE2_DIMMB DDR_CKE3_DIMMB
79 80
DDR_CKE2_DIMMB CKE0 NC/CKE1 DDR_CKE3_DIMMB
81 82
VDD VDD
83 84
NC NC/A15
DDR_B_BS2 DDR_B_MA14
85 86
DDR_B_BS2 BA2 NC/A14
87 88
VDD VDD
DDR_B_MA12 DDR_B_MA11
89 90
Layout Note:
A12 A11
DDR_B_MA9 DDR_B_MA7
91 92
A9 A7
Place one cap close to every 2 pullup DDR_B_MA8 DDR_B_MA6
93 94
A8 A6
95 96
resistors terminated to +0.9V
VDD VDD
DDR_B_MA5 DDR_B_MA4
97 98
A5 A4
DDR_B_MA3 DDR_B_MA2
99 100
A3 A2
DDR_B_MA1 DDR_B_MA0
101 102
A1 A0
103 104
VDD VDD
DDR_B_MA10 DDR_B_BS1
105 106
A10/AP BA1 DDR_B_BS1
DDR_B_BS0 DDR_B_RAS#
107 108
DDR_B_BS0 BA0 RAS# DDR_B_RAS#
DDR_B_WE# DDR_CS2_DIMMB#
109 110
DDR_B_WE# WE# S0# DDR_CS2_DIMMB#
111 112
VDD VDD
+0.9V
DDR_B_CAS# M_ODT2
113 114
DDR_B_CAS# CAS# ODT0 M_ODT2
DDR_CS3_DIMMB# DDR_B_MA13
115 116
DDR_CS3_DIMMB# NC/S1# NC/A13
117 118
VDD VDD
M_ODT3
119 120
M_ODT3 NC/ODT1 NC
121 122
VSS VSS
DDR_B_D30 DDR_B_D26
123 124
DQ32 DQ36
DDR_B_D27 DDR_B_D31
125 126
1 1 1 1 1 1 1 1 1 1 1 1 1
DQ33 DQ37
127 128
VSS VSS
DDR_B_DQS#3 DDR_B_DM3
129 130
DQS4# DM4
DDR_B_DQS3
131 132
2 2 2 2 2 2 2 2 2 2 2 2 2 DQS4 VSS
DDR_B_D24
133 134
VSS DQ38
DDR_B_D25 DDR_B_D29
135 136
DQ34 DQ39
DDR_B_D28
137 138
DQ35 VSS
DDR_B_D18
139 140
VSS DQ44
DDR_B_D23 DDR_B_D19
141 142
DQ40 DQ45
B B
DDR_B_D22
143 144
DQ41 VSS
DDR_B_DQS#2
145 146
VSS DQS5#
DDR_B_DM2 DDR_B_DQS2
147 148
DM5 DQS5
149 150
VSS VSS
DDR_B_D17 DDR_B_D21
151 152
DQ42 DQ46
DDR_B_D16 DDR_B_D20
153 154
DQ43 DQ47
155 156
VSS VSS
DDR_B_D11 DDR_B_D14
157 158
DQ48 DQ52
DDR_B_D10 DDR_B_D15
159 160
DQ49 DQ53
161 162
VSS VSS
163 164
NC,TEST CK1 M_CLK_DDR2
Layout Note: 165 166
VSS CK1# M_CLK_DDR#2
DDR_B_DQS#1
167 168
Place these resistor DQS6# VSS
+0.9V
DDR_B_DQS1 DDR_B_DM1
169 170
DQS6 DM6
closely JP10,all
171 172
VSS VSS
DDR_B_D12 DDR_B_D13
trace length Max=1.5" 173 174
DQ50 DQ54
DDR_B_MA1 DDR_B_MA9 DDR_B_D9 DDR_B_D8
1 4 4 1 175 176
DQ51 DQ55
DDR_B_MA3 DDR_B_MA12
2 3 3 2 177 178
VSS VSS
56_0404_4P2R_5% RP22 RP23 56_0404_4P2R_5%
56_0404_4P2R_5% RP22 RP23 56_0404_4P2R_5% DDR_B_D2 DDR_B_D7
179 180
DQ56 DQ60
DDR_B_D3 DDR_B_D6
181 182
DQ57 DQ61
DDR_B_BS0 DDR_CKE3_DIMMB
1 4 4 1 183 184
VSS VSS
DDR_B_MA10 DDR_B_MA14 DDR_B_DM0 DDR_B_DQS#0
2 3 3 2 185 186
DM7 DQS7#
56_0404_4P2R_5% RP24 RP25 56_0404_4P2R_5%
56_0404_4P2R_5% RP24 RP25 56_0404_4P2R_5% DDR_B_DQS0
187 188
VSS DQS7
DDR_B_D0
189 190
DQ58 VSS
DDR_B_MA0 DDR_B_MA5 DDR_B_D5 DDR_B_D1
1 4 4 1 191 192
DQ59 DQ62
DDR_B_BS1 DDR_B_MA8 DDR_B_D4
2 3 3 2 193 194
VSS DQ63
56_0404_4P2R_5% RP26 RP27 56_0404_4P2R_5%
56_0404_4P2R_5% RP26 RP27 56_0404_4P2R_5%
195 196
SDA VSS
ICH_SMBDATA
R73
R73
197 198
SCL SAO
ICH_SMBCLK
DDR_B_RAS# DDR_B_MA7
1 4 4 1 199 200 1 2
+3VM VDDSPD SA1 +3VM
DDR_CS2_DIMMB# DDR_B_MA6
2 3 3 2
56_0404_4P2R_5% RP28 RP29 56_0404_4P2R_5% 10K_0402_5%
56_0404_4P2R_5% RP28 RP29 56_0404_4P2R_5% 10K_0402_5%
CONN@ SUYIN_600008FB200G103ZL
CONN@ SUYIN_600008FB200G103ZL
1 1
A A
DDR_B_CAS# DDR_B_MA4
1 4 4 1
DDR_B_WE# DDR_B_MA2
2 3 3 2 SO-DIMM B
56_0404_4P2R_5% RP30 RP31 56_0404_4P2R_5%
56_0404_4P2R_5% RP30 RP31 56_0404_4P2R_5%
2 2
REVERSE
DDR_CS3_DIMMB# M_ODT2
2 3 4 1
Bottom side
M_ODT3 DDR_B_MA13
1 4 3 2
56_0404_4P2R_5% RP32 RP33 56_0404_4P2R_5%
56_0404_4P2R_5% RP32 RP33 56_0404_4P2R_5%
Security Classification Compal Secret Data
Security Classification Compal Secret Data
Security Classification Compal Secret Data
DDR_B_BS2 Compal Electronics, Inc.
Compal Electronics, Inc.
4 1 Compal Electronics, Inc.
DDR_B_MA11 DDR_CKE2_DIMMB Title
1 2 3 2 2006/02/13 2006/03/10 Title
2006/02/13 2006/03/10
2006/02/13 2006/03/10 Title
Issued Date Deciphered Date
Issued Date Deciphered Date
Issued Date Deciphered Date
56_0402_5% R80 RP34 56_0404_4P2R_5%
56_0402_5% R80 RP34 56_0404_4P2R_5%
SCHEMATIC, M/B LA-4021P
SCHEMATIC, M/B LA-4021P
SCHEMATIC, M/B LA-4021P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
B
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401554
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401554
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401554
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, June 03, 2009 Sheet 15 of 36
Date: Wednesday, June 03, 2009 Sheet 15 of 36
Date: Wednesday, June 03, 2009 Sheet 15 of 36
5 4 3 2 1
2.2U_0805_16V4Z
2.2U_0805_16V4Z
0.1U_0402_16V4Z
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C564
C564
C565
C565
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
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